U 0.375592 [VPU:PLATFORM:platform_early_init]: PM_RSTS: 0x1000 0x0 had power on reset PLLC target 500 MHz, CORE0 500 MHz, PER 500 MHz bringing PLLC up at 500MHz xtal_in = 19200000 goal_freq = 250000000 divisor 0xd05555 -> 13+(21845/2^20) waiting for lock VPU now at 500mhz(500), PLLC_CORE0 at 500mhz, PLLC_PER at 500MHz, PLLC at 500mhz bringing PLLA up at 500MHz xtal_in = 19200000 goal_freq = 500000000 divisor 0x1a0aaaa -> 26+(43690/2^20) ctrl: 0x2101a frac: 0x15554 waiting for lock ctrl: 0x2101a frac: 0x15554 ctrl: 0x2101a frac: 0xaaaa bringing PLLH up at 648MHz xtal_in = 19200000 goal_freq = 648000000 divisor 0x21c0000 -> 33+(786432/2^20) ctrl: 0x10000 frac: 0x0 ctrl: 0x1021 frac: 0xc0000 frac set to 0xc0000, wanted 0xc0000 waiting for lock ctrl: 0x21021 frac: 0xc0000 ctrl: 0x21021 frac: 0xc0000 0.447450 [SDRAM:sdram_init]: (0) SD_CS = 0x794200 0.452046 [SDRAM:sdram_init]: stack near 0x8001ffc4 0.456738 [SDRAM:switch_to_cprman_clock]: switching sdram to cprman clock (src=1, div=1), waiting for busy (0x4091) ... 0.467313 [SDRAM:switch_to_cprman_clock]: busy set, switch complete! 0.473474 [SDRAM:reset_phy]: reset_phy: resetting SDRAM PHY ... 0.479262 [SDRAM:reset_phy]: reset_phy: resetting DPHY CTRL ... 0.484940 [SDRAM:sdram_init]: waiting for SDUP (218E42) ... 0.490300 [SDRAM:sdram_init]: SDRAM controller has arrived! (218E42) 0.496459 [SDRAM:calibrate_pvt_early]: cpuid 0x4000140 and dq_slew 2 0.502622 [SDRAM:calibrate_pvt_early]: DPHY_CSR_DQ_PAD_DRV_SLEW_CTRL = 0x223 0.509470 [SDRAM:calibrate_pvt_early]: waiting for address PVT calibration ... 0.516497 [SDRAM:calibrate_pvt_early]: waiting for data PVT calibration ... 0.523263 [SDRAM:calibrate_pvt_early]: waiting for SDRAM calibration command ... 0.530476 [SDRAM:sdram_init]: SDRAM Type: Elpida 1GB LPDDR2 (BC=0x58) 0.536729 [SDRAM:reset_with_timing]: SDRAM Addressing Mode: Bank=3 Row=3 Col=3 SB=0xFF 0.544429 [SDRAM:selftest]: Starting self test ... 0.549025 [SDRAM:selftest_at]: Testing region at 0x3FF00000 ... 0.555057 [SDRAM:selftest_at]: Testing region at 0x2FF00000 ... 0.560782 [SDRAM:selftest_at]: Testing region at 0x1FF00000 ... 0.566507 [SDRAM:selftest_at]: Testing region at 0xFF00000 ... 0.572145 [SDRAM:selftest_at]: Testing region at 0x0 ... 0.577263 [SDRAM:selftest]: Self test successful! welcome to lk boot args 0x80014c80 0x0 0x80016ac8 0x80016ac8 initializing heap calling constructors initializing mp initializing threads initializing timers initializing ports creating bootstrap completion thread top of bootstrap2() arch_init r28: 0x800150c0 sp: 0xc0103594 cpuid: 4000140 ST_CLO: 602894 initializing platform INIT: cpu 0, calling hook 0x8000e956 (hvs) at level 0x8fffe, flags 0x1 hvs_init_hook() INIT: cpu 0, calling hook 0x8000bb3a (vec) at level 0x8ffff, flags 0x1 VEC init image domain starting... bringing up IMAGE domain, reg: 0x7e100108 waiting mem rep de-aserting reset lines usb power on... hvs_initialize() uploading scaling kernel ref: 500000000, target: 108000000, divisor(f): 4.629630, divisor(fixed): 0x4a12 mash not allowed on VEC vec rate: 0.000000, plla: 500000000, pllc: 500000000 setup_pixelvalve, pvnr=2, 720x240 interlaced pv NTSC on at 659537 hvs_configure_channel(1, 720, 480, true) setting up pv interrupt 0.666998 [VPU:PLATFORM:platform_init]: UART break detected A2W_SMPS_A_VOLTS: 0x0 initializing target INIT: cpu 0, calling hook 0x80004558 (vc4_timer) at level 0x90000, flags 0x1 INIT: cpu 0, calling hook 0x80006a88 (gfxconsole) at level 0x90000, flags 0x1 default FB on VEC creating 600x400 framebuffer 4 for text console gfxconsole: rows 33, columns 100, extray 4 INIT: cpu 0, calling hook 0x8000b89a (sdhost) at level 0x90001, flags 0x1 0.716711 [EMMC:restart_controller]: hcfg 0xE, cdiv 0x0, edm 0x8C01, hsts 0x0 0.723648 [EMMC:restart_controller]: Restarting the eMMC controller ... 0.731572 [EMMC:reset]: resetting controller ... 0.746525 [EMMC:query_voltage_and_type]: SD card has arrived! 0.750599 [EMMC:query_voltage_and_type]: This is an SDHC card! 0.756237 [EMMC:identify_card]: identifying card ... Product : SN128 CSD : Ver 2.0 Capacity: 249737216 Size : 243883 BlockLen: 0x200 0.770804 [EMMC:init_card]: Card initialization complete: SN128 121942MB SDHC Card 0.778096 [EMMC:init_card]: Identification complete, changing clock to 25MHz for data mode ... 0.787766 [EMMC:BCM2708SDHost]: eMMC driver sucessfully started! mbr partition table dump: 0: status 0x0, type 0xc, start 0x2000, len 0x100000 1: status 0x0, type 0x83, start 0x102000, len 0xed29000 2: status 0x0, type 0x0, start 0x0, len 0x0 3: status 0x0, type 0x0, start 0x0, len 0x0 0xc01eddbc INIT: cpu 0, calling hook 0x8000ba4e (usbphy) at level 0x90005, flags 0x1 image domain starting... bringing up IMAGE domain, reg: 0x7e100108 already on usb power on... bringing up usb PHY... usb PHY up INIT: cpu 0, calling hook 0x80009132 (dwc2) at level 0x90006, flags 0x1 dwc2 init hook 0.839250 [DWC2:dwc2_init_hook:1192]: queue init USB_HAINT: 0x0 USB_HAINTMSK: 0x0 masked irq's: 0x54000029 initializing apps stage1_init starting app stage1 stage1 entry 0.982919 [stage1:add_boot_target:201]: considering sdhostp1 as boot target 1.006128 [stage1:try_to_boot:170]: trying to boot from sdhostp1starting app auto_host doing init USB_PCGCCTL: 0x0 USB_GRSTCTL: 0x80000001 1.108940 [DWC2:hcd_init:1110]: reset completed USB_GRSTCTL: 0x80000000 s_log_groups_per_flex: 4 group descriptors: 0xc01f27a0 USB_PCGCCTL: 0x0 controller has 8 host channels 1.310702 [DWC2:dwc_check_interrupt:810]: Connector ID Status Change 1.334578 [DWC2:dwc_check_interrupt:822]: Session Request/New Session Detected Interrupt 1.360459 [DWC2:dwc_irq:835]: irq time: 49757 USB_HPRT: 0x21401 1.402937 [DWC2:dwc_check_interrupt:652]: Port Connect Detected at FS 1.426815 [DWC2:dwc_irq:835]: irq time: 43244 1.448614 [DWC2:hcd_int_enable:1172]: int unmasked init done, spinning on task 1.541115 [DWC2:hcd_port_reset:351]: reset on 1.612038 [DWC2:hcd_port_reset_end:356]: reset off USB_HPRT: 0x100d 1.653466 [DWC2:dwc_check_interrupt:664]: port enabled at HS 1.676562 [DWC2:dwc_irq:835]: irq time: 43180 temp changed 407.000000 -> -6.183990 USB_HPRT: 0x1005 2.102511 [DWC2:hcd_edpt_open:376]: dev 0 EP00 opened root port: 0 hub_addr: 0 hub_port: 0 speed: 2(HS) opep: 0x0xc01032b4 2.199114 [DWC2:hcd_setup_send:436]: HOST0 SETUP 0.00 0x0x80015520/8 opep:0x0xc01032b4 2.225424 [DWC2:dwc_send_setup:880]: dwc_send_setup(0x0x80016788, 0, 0, 0, 0x0x80015520) dumping channel 0: setup pre HCCHAR0: 0x0 mps:0 ep:0 dir0 type:0 mc:0 addr:0 HCSPLT0: 0x0 HCINT0: 0x0 HCINTMSK0: 0x0 HCTSIZ0: 0x0 size:0 packets:0 pid:0 ping:0 HCDMA0: 0xca486e63 dumping channel 0: setup init HCCHAR0: 0x100008 mps:8 ep:0 dir0 type:0 mc:1 addr:0 HCSPLT0: 0x0 HCINT0: 0x0 HCINTMSK0: 0x7ff HCTSIZ0: 0x60080008 size:8 packets:1 pid:3 ping:0 HCDMA0: 0x80015520 dumping channel 0: wants att HCCHAR0: 0x100008 mps:8 ep:0 dir0 type:0 mc:1 addr:0 HCSPLT0: 0x0 HCINT0: 0x23 xfer complete halted ack HCINTMSK0: 0x7ff HCTSIZ0: 0x20000008 size:8 packets:0 pid:1 ping:0 HCDMA0: 0x80015528 acking 0x23 0x80015520 80 06 00 01 00 00 08 00 38 55 01 80 80 7c 00 80 |........8U...|..| 0x80015530 07 00 00 00 00 01 00 00 00 00 00 00 00 00 00 00 |................| dumping channel 0: xfer comp HCCHAR0: 0x100008 mps:8 ep:0 dir0 type:0 mc:1 addr:0 HCSPLT0: 0x0 HCINT0: 0x0 HCINTMSK0: 0x7ff HCTSIZ0: 0x20000008 size:8 packets:0 pid:1 ping:0 HCDMA0: 0x80015528 3.091408 [DWC2:dwc_check_interrupt:737]: bytes 8, buflen 8, packets: 1, old next_pid: 3 3.116908 [DWC2:dwc_check_interrupt:738]: hcd_event_xfer_complete(0, 0x0, 8, success, true) 3.141468 [DWC2:dwc_irq:835]: irq time: 533248 temp changed -6.183990 -> 27.710022 3.185453 [DWC2:hcd_edpt_xfer:463]: HOST1 <- 0.80 0x80015538/8 opep:0xc01032b4 type:0 pid:2 dumping channel 1: wants att HCCHAR1: 0x108008 mps:8 ep:0 dir1 type:0 mc:1 addr:0 HCSPLT1: 0x0 HCINT1: 0x23 xfer complete halted ack HCINTMSK1: 0x7ff HCTSIZ1: 0x80000000 size:0 packets:0 pid:0 ping:1 HCDMA1: 0x80015540 acking 0x23 0x80015530 07 00 00 00 00 02 00 00 12 01 00 02 09 00 02 40 |...............@| 0x80015540 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |................| dumping channel 1: xfer comp HCCHAR1: 0x108008 mps:8 ep:0 dir1 type:0 mc:1 addr:0 HCSPLT1: 0x0 HCINT1: 0x0 HCINTMSK1: 0x7ff HCTSIZ1: 0x80000000 size:0 packets:0 pid:0 ping:1 HCDMA1: 0x80015540 3.695487 [DWC2:dwc_check_interrupt:737]: bytes 0, buflen 8, packets: 1, old next_pid: 2 3.720987 [DWC2:dwc_check_interrupt:738]: hcd_event_xfer_complete(0, 0x80, 8, success, true) 3.745629 [DWC2:dwc_irq:835]: irq time: 533625 3.818815 [DWC2:hcd_edpt_xfer:470]: HOST2 -> 0.00 0x0x0/0 opep:0x0xc01032b4 type:0 pid:2 3.844935 [DWC2:dwc_host_out:979]: size=0 dumping channel 2: out pre HCCHAR2: 0x0 mps:0 ep:0 dir0 type:0 mc:0 addr:0 HCSPLT2: 0x0 HCINT2: 0x0 HCINTMSK2: 0x0 HCTSIZ2: 0x0 size:0 packets:0 pid:0 ping:0 HCDMA2: 0xb0484168 dumping channel 2: OUT init HCCHAR2: 0x100008 mps:8 ep:0 dir0 type:0 mc:1 addr:0 HCSPLT2: 0x0 HCINT2: 0x0 HCINTMSK2: 0x7ff HCTSIZ2: 0x40080000 size:0 packets:1 pid:2 ping:0 HCDMA2: 0x00000000 dumping channel 2: wants att HCCHAR2: 0x100008 mps:8 ep:0 dir0 type:0 mc:1 addr:0 HCSPLT2: 0x0 HCINT2: 0x23 xfer complete halted ack HCINTMSK2: 0x7ff HCTSIZ2: 0x0 size:0 packets:0 pid:0 ping:0 HCDMA2: 0x00000000 acking 0x23 dumping channel 2: xfer comp HCCHAR2: 0x100008 mps:8 ep:0 dir0 type:0 mc:1 addr:0 HCSPLT2: 0x0 HCINT2: 0x0 HCINTMSK2: 0x7ff HCTSIZ2: 0x0 size:0 packets:0 pid:0 ping:0 HCDMA2: 0x00000000 4.655172 [DWC2:dwc_check_interrupt:737]: bytes 0, buflen 0, packets: 1, old next_pid: 2 4.680674 [DWC2:dwc_check_interrupt:738]: hcd_event_xfer_complete(0, 0x0, 0, success, true) 4.705228 [DWC2:dwc_irq:835]: irq time: 483067 4.728402 [DWC2:hcd_setup_send:436]: HOST3 SETUP 0.00 0x0x80015520/8 opep:0x0xc01032b4 4.754248 [DWC2:dwc_send_setup:880]: dwc_send_setup(0x0x80016788, 3, 0, 0, 0x0x80015520) dumping channel 3: setup pre HCCHAR3: 0x0 mps:0 ep:0 dir0 type:0 mc:0 addr:0 HCSPLT3: 0x0 HCINT3: 0x0 HCINTMSK3: 0x0 HCTSIZ3: 0x0 size:0 packets:0 pid:0 ping:0 HCDMA3: 0xff0fc981 dumping channel 3: setup init HCCHAR3: 0x100008 mps:8 ep:0 dir0 type:0 mc:1 addr:0 HCSPLT3: 0x0 HCINT3: 0x0 HCINTMSK3: 0x7ff HCTSIZ3: 0x60080008 size:8 packets:1 pid:3 ping:0 HCDMA3: 0x80015520 dumping channel 3: wants att HCCHAR3: 0x100008 mps:8 ep:0 dir0 type:0 mc:1 addr:0 HCSPLT3: 0x0 HCINT3: 0x23 xfer complete halted ack HCINTMSK3: 0x7ff HCTSIZ3: 0x20000008 size:8 packets:0 pid:1 ping:0 HCDMA3: 0x80015528 acking 0x23 0x80015520 00 05 08 00 00 00 00 00 00 00 00 00 80 7c 00 80 |.............|..| 0x80015530 08 00 00 00 00 01 00 00 12 01 00 02 09 00 02 40 |...............@| dumping channel 3: xfer comp HCCHAR3: 0x100008 mps:8 ep:0 dir0 type:0 mc:1 addr:0 HCSPLT3: 0x0 HCINT3: 0x0 HCINTMSK3: 0x7ff HCTSIZ3: 0x20000008 size:8 packets:0 pid:1 ping:0 HCDMA3: 0x80015528 5.619891 [DWC2:dwc_check_interrupt:737]: bytes 8, buflen 8, packets: 1, old next_pid: 3 5.645395 [DWC2:dwc_check_interrupt:738]: hcd_event_xfer_complete(0, 0x0, 8, success, true) 5.669952 [DWC2:dwc_irq:835]: irq time: 533161 5.733136 [DWC2:hcd_edpt_xfer:463]: HOST4 <- 0.80 0x0/0 opep:0xc01032b4 type:0 pid:2 dumping channel 4: wants att HCCHAR4: 0x108008 mps:8 ep:0 dir1 type:0 mc:1 addr:0 HCSPLT4: 0x0 HCINT4: 0x23 xfer complete halted ack HCINTMSK4: 0x7ff HCTSIZ4: 0x80000000 size:0 packets:0 pid:0 ping:1 HCDMA4: 0x00000000 acking 0x23 dumping channel 4: xfer comp HCCHAR4: 0x108008 mps:8 ep:0 dir1 type:0 mc:1 addr:0 HCSPLT4: 0x0 HCINT4: 0x0 HCINTMSK4: 0x7ff HCTSIZ4: 0x80000000 size:0 packets:0 pid:0 ping:1 HCDMA4: 0x00000000 6.193256 [DWC2:dwc_check_interrupt:737]: bytes 0, buflen 0, packets: 1, old next_pid: 2 6.218771 [DWC2:dwc_check_interrupt:738]: hcd_event_xfer_complete(0, 0x80, 0, success, true) 6.243417 [DWC2:dwc_irq:835]: irq time: 484500 flushing uart tx and chainloading... U 6.330821 [VPU:PLATFORM:platform_early_init]: PM_RSTS: 0x0 0x0 MEMORY: 0x4000000 + 0x1400000: VPU firmware PLLC target 500 MHz, CORE0 500 MHz, PER 500 MHz bringing PLLC up at 500MHz xtal_in = 19200000 goal_freq = 250000000 divisor 0xd05555 -> 13+(21845/2^20) waiting for lock VPU now at 500mhz(500), PLLC_CORE0 at 500mhz, PLLC_PER at 500MHz, PLLC at 500mhz bringing PLLA up at 432MHz xtal_in = 19200000 goal_freq = 432000000 divisor 0x1680000 -> 22+(524288/2^20) ctrl: 0x21016 frac: 0x15554 waiting for lock ctrl: 0x21016 frac: 0x15554 ctrl: 0x21016 frac: 0x80000 bringing PLLH up at 648MHz xtal_in = 19200000 goal_freq = 648000000 divisor 0x21c0000 -> 33+(786432/2^20) ctrl: 0x10000 frac: 0x0 ctrl: 0x1021 frac: 0xc0000 frac set to 0xc0000, wanted 0xc0000 waiting for lock ctrl: 0x21021 frac: 0xc0000 ctrl: 0x21021 frac: 0xc0000 welcome to lk boot args 0xc4053c80 0x0 0xc4055af8 0xc4055af8 initializing heap calling constructors initializing mp initializing threads initializing timers initializing ports creating bootstrap completion thread top of bootstrap2() arch_init r28: 0xc40540c0 sp: 0xc4154f3c cpuid: 4000140 ST_CLO: 6425976 initializing platform INIT: cpu 0, calling hook 0xc4006d40 (hvs) at level 0x8fffe, flags 0x1 hvs_init_hook() INIT: cpu 0, calling hook 0xc4004aba (vec) at level 0x8ffff, flags 0x1 VEC init image domain starting... bringing up IMAGE domain, reg: 0x7e100108 already on usb power on... hvs_initialize() uploading scaling kernel ref: 432000000, target: 108000000, divisor(f): 4.000000, divisor(fixed): 0x4000 vec rate: 108.000000, plla: 432000000, pllc: 500000000 setup_pixelvalve, pvnr=2, 720x240 interlaced pv NTSC on at 6478021 hvs_configure_channel(1, 720, 480, true) setting up pv interrupt 6.485569 [VPU:PLATFORM:platform_init]: A2W_SMPS_A_VOLTS: 0x0 initializing target INIT: cpu 0, calling hook 0xc40011be (vc4_timer) at level 0x90000, flags 0x1 INIT: cpu 0, calling hook 0xc40049ce (usbphy) at level 0x90005, flags 0x1 image domain starting... bringing up IMAGE domain, reg: 0x7e100108 already on usb power on... bringing up usb PHY... usb PHY up INIT: cpu 0, calling hook 0xc4003b46 (arm) at level 0x9000a, flags 0x1 6.533353 [ARM:choose_arm_payload]: detected a bcm2836, picking payload at 0xc40309a0 size 0x2162c bringing up PROC domain, reg: 0x7e100110 waiting mem rep de-aserting reset lines C0: 0x0, C1: 0x200, ERRHALT: 0x20 CM_LOCK: 0x1515 6.553992 [ARM:arm_init]: arm starting... 6.562806 [ARM:copy_arm_payload_to]: MEMORY: 0x0 + 0x2162c: arm payload header found at 0xc0021500 in 614 uSec 6.574340 [ARM:patch_arm_payload]: MEMORY: 0x0 + 0xa00000: payload ram fdt move 0xc4154f80 -> 0xa00000, size: 317 6.584502 [ARM:patch_arm_payload]: MEMORY: 0xa00000 + 0x13d: inter arch dtb 6.591257 [ARM:arm_init]: MEMORY: 0x0 + 0x4000000: ram 6.596200 [ARM:arm_init]: MEMORY: 0x7000000 + 0x19000000: ram 6.601751 [ARM:arm_init]: MEMORY: 0x20000000 + 0x1000000 (16mb): mmio 6.607997 [ARM:arm_init]: MEMORY: 0x3f000000 + 0x1000000 (16mb): mmio 6.614242 [ARM:arm_init]: MEMORY: 0x6000000 + 0x1000000 (16mb): framebuffer 6.621008 [ARM:arm_init]: armid 0x364d5241, C0 0x0 hvs channel 1, dlist start 12 0xc4154fb8 0xc6000000 screen 50, 30+620x420, viewport 0, 0+620x420, source: 620x420 layer: 1000 simple-framebuffer initializing PLLB ... arm divisor: 0x34 0x15555 KAIP = 0x228 MULTI = 0x613277 ARM clock succesfully initialized! bringing up PROC domain, reg: 0x7e100110 already on 6.657848 [ARM:bridgeStart]: starting async bridge now! 6.661399 [ARM:bridgeStart]: bridge init done, PM_PROC is now: 0x107F! C0: 0xa580f053, C1: 0x100, ERRHALT: 0x20 CM_LOCK: 0x1717 initializing apps mailbox base: 1 0x7e00b9a0 starting app properties waiting for property requests fc 0x5f74ddfc 0x5fdf7e7c 0xcfdedb1c INIT: cpu 0, calling hook 0x8000b7d4 (vm_preheap) at level 0x3ffff, flags 0x1 initializing heap calling constructors INIT: cpu 0, calling hook 0x8000b824 (vm) at level 0x4ffff, flags 0x1 initializing mp initializing threads initializing timers initializing ports creating bootstrap completion thread top of bootstrap2() creating bootstrap completion thread for cpu 1 creating bootstrap completion thread for cpu 2 creating bootstrap completion thread for cpu 3 releasing 3 secondary cpus initializing platform INIT: cpu 0, calling hook 0x800040cc (inter_arch) at level 0x8ffff, flags 0x1 hdr: 0x80021500 DTB should be at 0xa00000 mapped 0xa00000 to 0x40000000 DTB size is 317 offset:12 depth:1 name:framebuffer 620 x 420 @ 0x6000000 / 0x40001000 offset:80 depth:1 name:timestamps offset:132 depth:1 name:otp 6.757184 [ARM:PLATFORM:platform_init]: UART break detected A2W_SMPS_A_VOLTS: 0x0 initializing target INIT: cpu 0, calling hook 0x80009b2c (gfxconsole) at level 0x90000, flags 0x1 gfxconsole: rows 35, columns 103, extray 0 INIT: cpu 0, calling hook 0x80017168 (sdhost) at level 0x90001, flags 0x1 6.783711 [EMMC:restart_controller]: hcfg 0xA, cdiv 0x8, edm 0x10801, hsts 0x0 6.790733 [EMMC:restart_controller]: Restarting the eMMC controller ... 6.798658 [EMMC:reset]: resetting controller ... 6.812786 [EMMC:query_voltage_and_type]: SD card has arrived! 6.816875 [EMMC:query_voltage_and_type]: This is an SDHC card! 6.822513 [EMMC:identify_card]: identifying card ... Product : SN128 CSD : Ver 2.0 Capacity: 249737216 Size : 243883 BlockLen: 0x200 6.837077 [EMMC:init_card]: Card initialization complete: SN128 121942MB SDHC Card 6.844372 [EMMC:init_card]: Identification complete, changing clock to 25MHz for data mode ... 6.854294 [EMMC:BCM2708SDHost]: eMMC driver sucessfully started! mbr partition table dump: 0: status 0x0, type 0xc, start 0x2000, len 0x100000 1: status 0x0, type 0x83, start 0x102000, len 0xed29000 2: status 0x0, type 0x0, start 0x0, len 0x0 3: status 0x0, type 0x0, start 0x0, len 0x0 0x8003dce4 initializing apps starting app loader SP: 0x800420a0 6.884581 [LOADER:add_boot_target:82]: considering sdhostp1 as boot target 6.891267 [LOADER:try_to_boot:149]: trying to boot from sdhostp1 s_log_groups_per_flex: 4 group descriptors: 0x80042118 starting app shell entering main console loop ] SP: 0x80042048 dtb: rpi2.dtb, kernel: zImage-v7 7.264884 [LOADER:map_physical:236]: map_physical(0x1000000, 0x8002c40c, 33554432, zImage) 7.272966 [LOADER:map_physical:238]: done 7.289233 [LOADER:read_file:219]: file size is 7837320, buffer 0x40100000 temp changed 407.000000 -> 28.248016 U 0.375730 [VPU:PLATFORM:platform_early_init]: PM_RSTS: 0x1000 0x0 had power on reset PLLC target 500 MHz, CORE0 500 MHz, PER 500 MHz bringing PLLC up at 500MHz xtal_in = 19200000 goal_freq = 250000000 divisor 0xd05555 -> 13+(21845/2^20) waiting for lock VPU now at 500mhz(500), PLLC_CORE0 at 500mhz, PLLC_PER at 500MHz, PLLC at 500mhz bringing PLLA up at 500MHz xtal_in = 19200000 goal_freq = 500000000 divisor 0x1a0aaaa -> 26+(43690/2^20) ctrl: 0x2101a frac: 0x15554 waiting for lock ctrl: 0x2101a frac: 0x15554 ctrl: 0x2101a frac: 0xaaaa bringing PLLH up at 648MHz xtal_in = 19200000 goal_freq = 648000000 divisor 0x21c0000 -> 33+(786432/2^20) ctrl: 0x10000 frac: 0x0 ctrl: 0x1021 frac: 0xc0000 frac set to 0xc0000, wanted 0xc0000 waiting for lock ctrl: 0x21021 frac: 0xc0000 ctrl: 0x21021 frac: 0xc0000 0.447588 [SDRAM:sdram_init]: (0) SD_CS = 0x794200 0.452185 [SDRAM:sdram_init]: stack near 0x8001ffc4 0.456877 [SDRAM:switch_to_cprman_clock]: switching sdram to cprman clock (src=1, div=1), waiting for busy (0x4091) ... 0.467452 [SDRAM:switch_to_cprman_clock]: busy set, switch complete! 0.473613 [SDRAM:reset_phy]: reset_phy: resetting SDRAM PHY ... 0.479400 [SDRAM:reset_phy]: reset_phy: resetting DPHY CTRL ... 0.485078 [SDRAM:sdram_init]: waiting for SDUP (218E42) ... 0.490439 [SDRAM:sdram_init]: SDRAM controller has arrived! (218E42) 0.496598 [SDRAM:calibrate_pvt_early]: cpuid 0x4000140 and dq_slew 2 0.502761 [SDRAM:calibrate_pvt_early]: DPHY_CSR_DQ_PAD_DRV_SLEW_CTRL = 0x223 0.509609 [SDRAM:calibrate_pvt_early]: waiting for address PVT calibration ... 0.516635 [SDRAM:calibrate_pvt_early]: waiting for data PVT calibration ... 0.523401 [SDRAM:calibrate_pvt_early]: waiting for SDRAM calibration command ... 0.530614 [SDRAM:sdram_init]: SDRAM Type: Elpida 1GB LPDDR2 (BC=0x58) 0.536868 [SDRAM:reset_with_timing]: SDRAM Addressing Mode: Bank=3 Row=3 Col=3 SB=0xFF 0.544567 [SDRAM:selftest]: Starting self test ... 0.549164 [SDRAM:selftest_at]: Testing region at 0x3FF00000 ... 0.555195 [SDRAM:selftest_at]: Testing region at 0x2FF00000 ... 0.560920 [SDRAM:selftest_at]: Testing region at 0x1FF00000 ... 0.566645 [SDRAM:selftest_at]: Testing region at 0xFF00000 ... 0.572283 [SDRAM:selftest_at]: Testing region at 0x0 ... 0.577401 [SDRAM:selftest]: Self test successful! welcome to lk boot args 0x80014c80 0x0 0x80016ac8 0x80016ac8 initializing heap calling constructors initializing mp initializing threads initializing timers initializing ports creating bootstrap completion thread top of bootstrap2() arch_init r28: 0x800150c0 sp: 0xc0103594 cpuid: 4000140 ST_CLO: 603032 initializing platform INIT: cpu 0, calling hook 0x8000e956 (hvs) at level 0x8fffe, flags 0x1 hvs_init_hook() INIT: cpu 0, calling hook 0x8000bb3a (vec) at level 0x8ffff, flags 0x1 VEC init image domain starting... bringing up IMAGE domain, reg: 0x7e100108 waiting mem rep de-aserting reset lines usb power on... hvs_initialize() uploading scaling kernel ref: 500000000, target: 108000000, divisor(f): 4.629630, divisor(fixed): 0x4a12 mash not allowed on VEC vec rate: 0.000000, plla: 500000000, pllc: 500000000 setup_pixelvalve, pvnr=2, 720x240 interlaced pv NTSC on at 659675 hvs_configure_channel(1, 720, 480, true) setting up pv interrupt 0.667137 [VPU:PLATFORM:platform_init]: UART break detected A2W_SMPS_A_VOLTS: 0x0 initializing target INIT: cpu 0, calling hook 0x80004558 (vc4_timer) at level 0x90000, flags 0x1 INIT: cpu 0, calling hook 0x80006a88 (gfxconsole) at level 0x90000, flags 0x1 default FB on VEC creating 600x400 framebuffer 4 for text console gfxconsole: rows 33, columns 100, extray 4 INIT: cpu 0, calling hook 0x8000b89a (sdhost) at level 0x90001, flags 0x1 0.716850 [EMMC:restart_controller]: hcfg 0xE, cdiv 0x0, edm 0x8C01, hsts 0x0 0.723787 [EMMC:restart_controller]: Restarting the eMMC controller ... 0.731710 [EMMC:reset]: resetting controller ... 0.746392 [EMMC:query_voltage_and_type]: SD card has arrived! 0.750467 [EMMC:query_voltage_and_type]: This is an SDHC card! 0.756105 [EMMC:identify_card]: identifying card ... Product : SN128 CSD : Ver 2.0 Capacity: 249737216 Size : 243883 BlockLen: 0x200 0.770671 [EMMC:init_card]: Card initialization complete: SN128 121942MB SDHC Card 0.777964 [EMMC:init_card]: Identification complete, changing clock to 25MHz for data mode ... 0.787854 [EMMC:BCM2708SDHost]: eMMC driver sucessfully started! mbr partition table dump: 0: status 0x0, type 0xc, start 0x2000, len 0x100000 1: status 0x0, type 0x83, start 0x102000, len 0xed29000 2: status 0x0, type 0x0, start 0x0, len 0x0 3: status 0x0, type 0x0, start 0x0, len 0x0 0xc01eddbc INIT: cpu 0, calling hook 0x8000ba4e (usbphy) at level 0x90005, flags 0x1 image domain starting... bringing up IMAGE domain, reg: 0x7e100108 already on usb power on... bringing up usb PHY... usb PHY up INIT: cpu 0, calling hook 0x80009132 (dwc2) at level 0x90006, flags 0x1 dwc2 init hook 0.839118 [DWC2:dwc2_init_hook:1192]: queue init USB_HAINT: 0x0 USB_HAINTMSK: 0x0 masked irq's: 0x54000029 initializing apps stage1_init starting app stage1 stage1 entry 0.982722 [stage1:add_boot_target:201]: considering sdhostp1 as boot target 1.005923 [stage1:try_to_boot:170]: trying to boot from sdhostp1 s_log_groups_per_flex: 4starting app auto_host doing init USB_PCGCCTL: 0x0 USB_GRSTCTL: 0x80000001 1.129404 [DWC2:hcd_init:1110 group descriptors: 0xc01f27a0 ]: reset completed USB_GRSTCTL: 0x80000000 USB_PCGCCTL: 0x0 controller has 8 host channels 1.320279 [DWC2:dwc_check_interrupt:810]: Connector ID Status Change 1.344130 [DWC2:dwc_check_interrupt:822]: Session Request/New Session Detected Interrupt 1.369988 [DWC2:dwc_irq:835]: irq time: 49709 USB_HPRT: 0x21401 1.412401 [DWC2:dwc_check_interrupt:652]: Port Connect Detected at FS 1.436256 [DWC2:dwc_irq:835]: irq time: 43190 1.508039 [DWC2:hcd_int_enable:1172]: int unmasked init done, spinning on task 1.550317 [DWC2:hcd_port_reset:351]: reset on 1.621224 [DWC2:hcd_port_reset_end:356]: reset off USB_HPRT: 0x100d 1.712607 [DWC2:dwc_check_interrupt:664]: port enabled at HS 1.735678 [DWC2:dwc_irq:835]: irq time: 43078 temp changed 407.000000 -> -6.183990 USB_HPRT: 0x1005 2.161562 [DWC2:hcd_edpt_open:376]: dev 0 EP00 opened root port: 0 hub_addr: 0 hub_port: 0 speed: 2(HS) opep: 0x0xc01032b4 2.208115 [DWC2:hcd_setup_send:436]: HOST0 SETUP 0.00 0x0x80015520/8 opep:0x0xc01032b4 2.234402 [DWC2:dwc_send_setup:880]: dwc_send_setup(0x0x80016788, 0, 0, 0, 0x0x80015520) dumping channel 0: setup pre HCCHAR0: 0x0 mps:0 ep:0 dir0 type:0 mc:0 addr:0 HCSPLT0: 0x0 HCINT0: 0x0 HCINTMSK0: 0x0 HCTSIZ0: 0x0 size:0 packets:0 pid:0 ping:0 HCDMA0: 0xcac86e63 dumping channel 0: setup init HCCHAR0: 0x100008 mps:8 ep:0 dir0 type:0 mc:1 addr:0 HCSPLT0: 0x0 HCINT0: 0x0 HCINTMSK0: 0x7ff HCTSIZ0: 0x60080008 size:8 packets:1 pid:3 ping:0 HCDMA0: 0x80015520 dumping channel 0: wants att HCCHAR0: 0x100008 mps:8 ep:0 dir0 type:0 mc:1 addr:0 HCSPLT0: 0x0 HCINT0: 0x23 xfer complete halted ack HCINTMSK0: 0x7ff HCTSIZ0: 0x20000008 size:8 packets:0 pid:1 ping:0 HCDMA0: 0x80015528 acking 0x23 0x80015520 80 06 00 01 00 00 08 00 38 55 01 80 80 7c 00 80 |........8U...|..| 0x80015530 07 00 00 00 00 01 00 00 00 00 00 00 00 00 00 00 |................| dumping channel 0: xfer comp HCCHAR0: 0x100008 mps:8 ep:0 dir0 type:0 mc:1 addr:0 HCSPLT0: 0x0 HCINT0: 0x0 HCINTMSK0: 0x7ff HCTSIZ0: 0x20000008 size:8 packets:0 pid:1 ping:0 HCDMA0: 0x80015528 3.100122 [DWC2:dwc_check_interrupt:737]: bytes 8, buflen 8, packets: 1, old next_pid: 3 3.125622 [DWC2:dwc_check_interrupt:738]: hcd_event_xfer_complete(0, 0x0, 8, success, true) 3.150180 [DWC2:dwc_irq:835]: irq time: 533209 temp changed -6.183990 -> 27.171997 3.244187 [DWC2:hcd_edpt_xfer:463]: HOST1 <- 0.80 0x80015538/8 opep:0xc01032b4 type:0 pid:2 dumping channel 1: wants att HCCHAR1: 0x108008 mps:8 ep:0 dir1 type:0 mc:1 addr:0 HCSPLT1: 0x0 HCINT1: 0x23 xfer complete halted ack HCINTMSK1: 0x7ff HCTSIZ1: 0x80000000 size:0 packets:0 pid:0 ping:1 HCDMA1: 0x80015540 acking 0x23 0x80015530 07 00 00 00 00 02 00 00 12 01 00 02 09 00 02 40 |...............@| 0x80015540 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |................| dumping channel 1: xfer comp HCCHAR1: 0x108008 mps:8 ep:0 dir1 type:0 mc:1 addr:0 HCSPLT1: 0x0 HCINT1: 0x0 HCINTMSK1: 0x7ff HCTSIZ1: 0x80000000 size:0 packets:0 pid:0 ping:1 HCDMA1: 0x80015540 3.754182 [DWC2:dwc_check_interrupt:737]: bytes 0, buflen 8, packets: 1, old next_pid: 2 3.779690 [DWC2:dwc_check_interrupt:738]: hcd_event_xfer_complete(0, 0x80, 8, success, true) 3.804336 [DWC2:dwc_irq:835]: irq time: 533758 3.827515 [DWC2:hcd_edpt_xfer:470]: HOST2 -> 0.00 0x0x0/0 opep:0x0xc01032b4 type:0 pid:2 3.853804 [DWC2:dwc_host_out:979]: size=0 dumping channel 2: out pre HCCHAR2: 0x0 mps:0 ep:0 dir0 type:0 mc:0 addr:0 HCSPLT2: 0x0 HCINT2: 0x0 HCINTMSK2: 0x0 HCTSIZ2: 0x0 size:0 packets:0 pid:0 ping:0 HCDMA2: 0xb4484168 dumping channel 2: OUT init HCCHAR2: 0x100008 mps:8 ep:0 dir0 type:0 mc:1 addr:0 HCSPLT2: 0x0 HCINT2: 0x0 HCINTMSK2: 0x7ff HCTSIZ2: 0x40080000 size:0 packets:1 pid:2 ping:0 HCDMA2: 0x00000000 dumping channel 2: wants att HCCHAR2: 0x100008 mps:8 ep:0 dir0 type:0 mc:1 addr:0 HCSPLT2: 0x0 HCINT2: 0x23 xfer complete halted ack HCINTMSK2: 0x7ff HCTSIZ2: 0x0 size:0 packets:0 pid:0 ping:0 HCDMA2: 0x00000000 acking 0x23 dumping channel 2: xfer comp HCCHAR2: 0x100008 mps:8 ep:0 dir0 type:0 mc:1 addr:0 HCSPLT2: 0x0 HCINT2: 0x0 HCINTMSK2: 0x7ff HCTSIZ2: 0x0 size:0 packets:0 pid:0 ping:0 HCDMA2: 0x00000000 4.664152 [DWC2:dwc_check_interrupt:737]: bytes 0, buflen 0, packets: 1, old next_pid: 2 4.689658 [DWC2:dwc_check_interrupt:738]: hcd_event_xfer_complete(0, 0x0, 0, success, true) 4.714221 [DWC2:dwc_irq:835]: irq time: 483133 4.737403 [DWC2:hcd_setup_send:436]: HOST3 SETUP 0.00 0x0x80015520/8 opep:0x0xc01032b4 4.763256 [DWC2:dwc_send_setup:880]: dwc_send_setup(0x0x80016788, 3, 0, 0, 0x0x80015520) dumping channel 3: setup pre HCCHAR3: 0x0 mps:0 ep:0 dir0 type:0 mc:0 addr:0 HCSPLT3: 0x0 HCINT3: 0x0 HCINTMSK3: 0x0 HCTSIZ3: 0x0 size:0 packets:0 pid:0 ping:0 HCDMA3: 0xff2fc981 dumping channel 3: setup init HCCHAR3: 0x100008 mps:8 ep:0 dir0 type:0 mc:1 addr:0 HCSPLT3: 0x0 HCINT3: 0x0 HCINTMSK3: 0x7ff HCTSIZ3: 0x60080008 size:8 packets:1 pid:3 ping:0 HCDMA3: 0x80015520 dumping channel 3: wants att HCCHAR3: 0x100008 mps:8 ep:0 dir0 type:0 mc:1 addr:0 HCSPLT3: 0x0 HCINT3: 0x23 xfer complete halted ack HCINTMSK3: 0x7ff HCTSIZ3: 0x20000008 size:8 packets:0 pid:1 ping:0 HCDMA3: 0x80015528 acking 0x23 0x80015520 00 05 08 00 00 00 00 00 00 00 00 00 80 7c 00 80 |.............|..| 0x80015530 08 00 00 00 00 01 00 00 12 01 00 02 09 00 02 40 |...............@| dumping channel 3: xfer comp HCCHAR3: 0x100008 mps:8 ep:0 dir0 type:0 mc:1 addr:0 HCSPLT3: 0x0 HCINT3: 0x0 HCINTMSK3: 0x7ff HCTSIZ3: 0x20000008 size:8 packets:0 pid:1 ping:0 HCDMA3: 0x80015528 5.629149 [DWC2:dwc_check_interrupt:737]: bytes 8, buflen 8, packets: 1, old next_pid: 3 5.654659 [DWC2:dwc_check_interrupt:738]: hcd_event_xfer_complete(0, 0x0, 8, success, true) 5.679220 [DWC2:dwc_irq:835]: irq time: 533287 5.742412 [DWC2:hcd_edpt_xfer:463]: HOST4 <- 0.80 0x0/0 opep:0xc01032b4 type:0 pid:2 dumping channel 4: wants att HCCHAR4: 0x108008 mps:8 ep:0 dir1 type:0 mc:1 addr:0 HCSPLT4: 0x0 HCINT4: 0x23 xfer complete halted ack HCINTMSK4: 0x7ff HCTSIZ4: 0x80000000 size:0 packets:0 pid:0 ping:1 HCDMA4: 0x00000000 acking 0x23 dumping channel 4: xfer comp HCCHAR4: 0x108008 mps:8 ep:0 dir1 type:0 mc:1 addr:0 HCSPLT4: 0x0 HCINT4: 0x0 HCINTMSK4: 0x7ff HCTSIZ4: 0x80000000 size:0 packets:0 pid:0 ping:1 HCDMA4: 0x00000000 6.202677 [DWC2:dwc_check_interrupt:737]: bytes 0, buflen 0, packets: 1, old next_pid: 2 6.228186 [DWC2:dwc_check_interrupt:738]: hcd_event_xfer_complete(0, 0x80, 0, success, true) 6.252841 [DWC2:dwc_irq:835]: irq time: 484639 6.276027 [DWC2:hcd_device_close:404]: 0 closed 6.297863 [DWC2:hcd_edpt_open:376]: dev 8 EP00 opened root port: 0 hub_addr: 0 hub_port: 0 speed: 2(HS) opep: 0x0xc0103300flushing uart tx and chainloading... U 6.402024 [VPU:PLATFORM:platform_early_init]: PM_RSTS: 0x0 0x0 MEMORY: 0x4000000 + 0x1400000: VPU firmware PLLC target 500 MHz, CORE0 500 MHz, PER 500 MHz bringing PLLC up at 500MHz xtal_in = 19200000 goal_freq = 250000000 divisor 0xd05555 -> 13+(21845/2^20) waiting for lock VPU now at 500mhz(500), PLLC_CORE0 at 500mhz, PLLC_PER at 500MHz, PLLC at 500mhz bringing PLLA up at 432MHz xtal_in = 19200000 goal_freq = 432000000 divisor 0x1680000 -> 22+(524288/2^20) ctrl: 0x21016 frac: 0x15554 waiting for lock ctrl: 0x21016 frac: 0x15554 ctrl: 0x21016 frac: 0x80000 bringing PLLH up at 648MHz xtal_in = 19200000 goal_freq = 648000000 divisor 0x21c0000 -> 33+(786432/2^20) ctrl: 0x10000 frac: 0x0 ctrl: 0x1021 frac: 0xc0000 frac set to 0xc0000, wanted 0xc0000 waiting for lock ctrl: 0x21021 frac: 0xc0000 ctrl: 0x21021 frac: 0xc0000 welcome to lk boot args 0xc4053c80 0x0 0xc4055af8 0xc4055af8 initializing heap calling constructors initializing mp initializing threads initializing timers initializing ports creating bootstrap completion thread top of bootstrap2() arch_init r28: 0xc40540c0 sp: 0xc4154f3c cpuid: 4000140 ST_CLO: 6497179 initializing platform INIT: cpu 0, calling hook 0xc4006d40 (hvs) at level 0x8fffe, flags 0x1 hvs_init_hook() INIT: cpu 0, calling hook 0xc4004aba (vec) at level 0x8ffff, flags 0x1 VEC init image domain starting... bringing up IMAGE domain, reg: 0x7e100108 already on usb power on... hvs_initialize() uploading scaling kernel ref: 432000000, target: 108000000, divisor(f): 4.000000, divisor(fixed): 0x4000 vec rate: 108.000000, plla: 432000000, pllc: 500000000 setup_pixelvalve, pvnr=2, 720x240 interlaced pv NTSC on at 6549224 hvs_configure_channel(1, 720, 480, true) setting up pv interrupt 6.556773 [VPU:PLATFORM:platform_init]: A2W_SMPS_A_VOLTS: 0x0 initializing target INIT: cpu 0, calling hook 0xc40011be (vc4_timer) at level 0x90000, flags 0x1 INIT: cpu 0, calling hook 0xc40049ce (usbphy) at level 0x90005, flags 0x1 image domain starting... bringing up IMAGE domain, reg: 0x7e100108 already on usb power on... bringing up usb PHY... usb PHY up INIT: cpu 0, calling hook 0xc4003b46 (arm) at level 0x9000a, flags 0x1 6.604557 [ARM:choose_arm_payload]: detected a bcm2836, picking payload at 0xc40309a0 size 0x2162c bringing up PROC domain, reg: 0x7e100110 waiting mem rep de-aserting reset lines C0: 0x0, C1: 0x200, ERRHALT: 0x20 CM_LOCK: 0x1515 6.625196 [ARM:arm_init]: arm starting... 6.634010 [ARM:copy_arm_payload_to]: MEMORY: 0x0 + 0x2162c: arm payload header found at 0xc0021500 in 614 uSec 6.645544 [ARM:patch_arm_payload]: MEMORY: 0x0 + 0xa00000: payload ram fdt move 0xc4154f80 -> 0xa00000, size: 317 6.655706 [ARM:patch_arm_payload]: MEMORY: 0xa00000 + 0x13d: inter arch dtb 6.662461 [ARM:arm_init]: MEMORY: 0x0 + 0x4000000: ram 6.667404 [ARM:arm_init]: MEMORY: 0x7000000 + 0x19000000: ram 6.672955 [ARM:arm_init]: MEMORY: 0x20000000 + 0x1000000 (16mb): mmio 6.679201 [ARM:arm_init]: MEMORY: 0x3f000000 + 0x1000000 (16mb): mmio 6.685446 [ARM:arm_init]: MEMORY: 0x6000000 + 0x1000000 (16mb): framebuffer 6.692212 [ARM:arm_init]: armid 0x364d5241, C0 0x0 hvs channel 1, dlist start 12 0xc4154fb8 0xc6000000 screen 50, 30+620x420, viewport 0, 0+620x420, source: 620x420 layer: 1000 simple-framebuffer initializing PLLB ... arm divisor: 0x34 0x15555 KAIP = 0x228 MULTI = 0x613277 ARM clock succesfully initialized! bringing up PROC domain, reg: 0x7e100110 already on 6.729051 [ARM:bridgeStart]: starting async bridge now! 6.732602 [ARM:bridgeStart]: bridge init done, PM_PROC is now: 0x107F! C0: 0xa580f053, C1: 0x100, ERRHALT: 0x20 CM_LOCK: 0x1717 initializing apps mailbox base: 1 0x7e00b9a0 starting app properties waiting for property requests x1f74ddfc 0x5fdffe7c 0xcffedb1c INIT: cpu 0, calling hook 0x8000b7d4 (vm_preheap) at level 0x3ffff, flags 0x1 initializing heap calling constructors INIT: cpu 0, calling hook 0x8000b824 (vm) at level 0x4ffff, flags 0x1 initializing mp initializing threads initializing timers initializing ports creating bootstrap completion thread top of bootstrap2() creating bootstrap completion thread for cpu 1 creating bootstrap completion thread for cpu 2 creating bootstrap completion thread for cpu 3 releasing 3 secondary cpus initializing platform INIT: cpu 0, calling hook 0x800040cc (inter_arch) at level 0x8ffff, flags 0x1 hdr: 0x80021500 DTB should be at 0xa00000 mapped 0xa00000 to 0x40000000 DTB size is 317 offset:12 depth:1 name:framebuffer 620 x 420 @ 0x6000000 / 0x40001000 offset:80 depth:1 name:timestamps offset:132 depth:1 name:otp 6.828039 [ARM:PLATFORM:platform_init]: UART break detected A2W_SMPS_A_VOLTS: 0x0 initializing target INIT: cpu 0, calling hook 0x80009b2c (gfxconsole) at level 0x90000, flags 0x1 gfxconsole: rows 35, columns 103, extray 0 INIT: cpu 0, calling hook 0x80017168 (sdhost) at level 0x90001, flags 0x1 6.854567 [EMMC:restart_controller]: hcfg 0xA, cdiv 0x8, edm 0x10801, hsts 0x0 6.861589 [EMMC:restart_controller]: Restarting the eMMC controller ... 6.869515 [EMMC:reset]: resetting controller ... 6.884667 [EMMC:query_voltage_and_type]: SD card has arrived! 6.888757 [EMMC:query_voltage_and_type]: This is an SDHC card! 6.894395 [EMMC:identify_card]: identifying card ... Product : SN128 CSD : Ver 2.0 Capacity: 249737216 Size : 243883 BlockLen: 0x200 6.908959 [EMMC:init_card]: Card initialization complete: SN128 121942MB SDHC Card 6.916254 [EMMC:init_card]: Identification complete, changing clock to 25MHz for data mode ... 6.925957 [EMMC:BCM2708SDHost]: eMMC driver sucessfully started! mbr partition table dump: 0: status 0x0, type 0xc, start 0x2000, len 0x100000 1: status 0x0, type 0x83, start 0x102000, len 0xed29000 2: status 0x0, type 0x0, start 0x0, len 0x0 3: status 0x0, type 0x0, start 0x0, len 0x0 0x8003dce4 initializing apps starting app loader SP: 0x800420a0 6.956417 [LOADER:add_boot_target:82]: considering sdhostp1 as boot target 6.963104 [LOADER:try_to_boot:149]: trying to boot from sdhostp1 s_log_groups_per_flex: 4 group descriptors: 0x80042118 starting app shell entering main console loop ] SP: 0x80042048 dtb: rpi2.dtb, kernel: zImage-v7 7.337549 [LOADER:map_physical:236]: map_physical(0x1000000, 0x8002c40c, 33554432, zImage) 7.345631 [LOADER:map_physical:238]: done 7.361815 [LOADER:read_file:219]: file size is 7837320, buffer 0x40100000 temp changed 407.000000 -> 29.862000 13.648761 [LOADER:read_file:222]: read 7837320 bytes 13.656325 [LOADER:read_file:228]: closing 13.663349 [LOADER:map_physical:236]: map_physical(0x3000000, 0x8002c404, 1048576, raw dtb) 13.675541 [LOADER:map_physical:238]: done 13.694058 [LOADER:read_file:219]: file size is 6896, buffer 0x42100000 13.709075 [LOADER:read_file:222]: read 6896 bytes 13.716392 [LOADER:read_file:228]: closing loaded DTB file to 0x42100000 13.730398 [LOADER:map_physical:236]: map_physical(0x3100000, 0x8002c408, 16777216, initrd) 13.741659 [LOADER:map_physical:238]: done 27.648761 [LOADER:read_file:219]: file size is 167, buffer 0x80036f2c 27.660899 [LOADER:read_file:222]: read 167 bytes 27.668132 [LOADER:read_file:228]: closing kernel cmdline is: earlycon=pl011,0x3f201000 console=ttyAMA0,115200 console=tty1 root=PARTUUID=a59b06ee-02 rootfstype=ext4 fsck.repair=yes rootwait splash plymouth.ignore-serial-consoles core 0 passing control off to linux!!! [ 0.000000] Booting Linux on physical CPU 0xf00 [ 0.000000] Linux version 6.6.30-v7l+ (johannes@e6430) (arm-linux-gnueabihf-gcc (Debian 10.2.1-6) 10.2.1 20210110, GNU ld (GNU Binutils for Debian) 2.35.2) #1 SMP Fri May 3 00:17:18 CEST 2024 [ 0.000000] CPU: ARMv7 Processor [410fc075] revision 5 (ARMv7), cr=30c5387d [ 0.000000] CPU: div instructions available: patching division code [ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache [ 0.000000] OF: fdt: Machine model: Raspberry Pi 2 Model B, with open firmware [ 0.000000] earlycon: pl11 at MMIO 0x000000003f201000 (options '') [ 0.000000] printk: bootconsole [pl11] enabled [ 0.000000] Memory policy: Data cache writealloc [ 0.000000] INITRD: 0x03100000+0x00f49000 is not a memory region - disabling initrd [ 0.000000] cma: Reserved 8 MiB at 0x000000001f800000 on node -1 [ 0.000000] Zone ranges: [ 0.000000] DMA [mem 0x0000000000000000-0x000000001fffffff] [ 0.000000] Normal empty [ 0.000000] HighMem empty [ 0.000000] Movable zone start for each node [ 0.000000] Early memory node ranges [ 0.000000] node 0: [mem 0x0000000000000000-0x0000000003ffffff] [ 0.000000] node 0: [mem 0x0000000007000000-0x000000001fffffff] [ 0.000000] Initmem setup node 0 [mem 0x0000000000000000-0x000000001fffffff] [ 0.000000] percpu: Embedded 18 pages/cpu s41940 r8192 d23596 u73728 [ 0.000000] Kernel command line: earlycon=pl011,0x3f201000 console=ttyAMA0,115200 console=tty1 root=PARTUUID=a59b06ee-02 rootfstype=ext4 fsck.repair=yes rootwait splash plymouth.ignore-serial-consoles [ 0.000000] Unknown kernel command line parameters "splash", will be passed to user space. [ 0.000000] Dentry cache hash table entries: 65536 (order: 6, 262144 bytes, linear) [ 0.000000] Inode-cache hash table entries: 32768 (order: 5, 131072 bytes, linear) [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 117632 [ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off [ 0.000000] Memory: 441612K/475136K available (12288K kernel code, 1526K rwdata, 3488K rodata, 2048K init, 629K bss, 25332K reserved, 8192K cma-reserved, 0K highmem) [ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=1, Nodes=1 [ 0.000000] ftrace: allocating 38830 entries in 114 pages [ 0.000000] ftrace: allocated 114 pages with 4 groups [ 0.000000] trace event string verifier disabled [ 0.000000] rcu: Hierarchical RCU implementation. [ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=4 to nr_cpu_ids=1. [ 0.000000] Rude variant of Tasks RCU enabled. [ 0.000000] Tracing variant of Tasks RCU enabled. [ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 10 jiffies. [ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=1 [ 0.000000] NR_IRQS: 16, nr_irqs: 16, preallocated irqs: 16 [ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention. [ 0.000000] arch_timer: cp15 timer(s) running at 1.00MHz (virt). [ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x1d854df40, max_idle_ns: 3526361616960 ns [ 0.000091] sched_clock: 56 bits at 1000kHz, resolution 1000ns, wraps every 2199023255500ns [ 0.164030] Switching to timer-based delay loop, resolution 1000ns [ 0.300983] Console: colour dummy device 80x30 [ 0.389853] printk: console [tty1] enabled [ 0.471809] printk: bootconsole [pl11] disabled temp changed 29.862000 -> 32.014008 temp changed 32.014008 -> 34.166016